VHDL Macro: VGA80x40

From JavierValcarce.Eu

VHDL Macro

component vga80x40
    port (
      reset    : in  std_logic;
      clk25MHz : in  std_logic;
      R        : out std_logic;
      G        : out std_logic;
      B        : out std_logic;
      TEXT_A   : out std_logic_vector(11 downto 0);
      TEXT_D   : in  std_logic_vector(07 downto 0);
      FONT_A   : out std_logic_vector(11 downto 0);
      FONT_D   : in  std_logic_vector(07 downto 0);
      hsync    : out std_logic;
      vsync    : out std_logic;
      ocrx     : in  std_logic_vector(07 downto 0);
      ocry     : in  std_logic_vector(07 downto 0);
      octl     : in  std_logic_vector(07 downto 0)
      );   
  end component;

This VHDL macro is a Text Mode Monochrome Video Display Adapter intended to be used as a PicoBlaze (or other CPU) peripheral. It's not much better than the original IBM MDA card appeared in 1981 ;-)

• resolution of 80x40 characters, dot resolution is 640x480 pixels at 60Hz so the core needs a clock signal of 25MHz. I prefer 80x40 instead the classical 80x25, in my opinion, the latter is an annoyance.
• monochrome, it hasn't "attribute" memory to store the colour of each character. The unique output color is selectable among 8 different colours
• 8-bit ASCII codes (iso-latin-0 or other that you prefer)
• the video text buffer is an external memory of bytes. The character at (column, row) = (0, 0) is at the RAM address 0, the character at (79, 39) is at 3199.
• the ROM that store fixed-width bitmap font is also external, the bitmap can be changed modifying the COE file. The COE file provided is iso-8859-15 (also called iso-latin-0), is very similar to the iso-8859-1 but with the Euro (€) symbol added.
• hardware cursor, with two different shapes; with enable/disable control.
• simple IO interface. Three registers
  • CRX. Position (column) for HW cursor
  • CRY. Position (row) for HW cursor
  • CTL. Control register for de/activate the HW cursor, change its shape, de/activate VGA signal, output colour, etc.
• uses 100 slices in a Xilinx Spartan-3.
• the design is vendor-agnostic. You can use it in Xilinx/PicoBlaze, Altera/NIOSII, etc

Monocrome Video Display Adapter

Console Font 8x12 iso-8859-15

Ports And Usage

The macro has the following ports:

This macro, therefore, needs two external memories to store text and font data not included in the source files package. This memories must be created by you using, for example, Xilinx CORE Generator or an equivalent tool from other vendor^[1]. The lat0-12.coe file contains the data for the font ROM memory. View a complete example of how to use this macro in The Game Of Life for PicoBlaze.

Interface with a VGA monitor

The electrical interface between FPGA and the VGA monitor is very simple, only 3 resistors of 270Ω are needed. The following figure is extracted from S3Board manual from Xilinx (S3Board is the development FPGA board that I use)

The input impedance of every signal (R, G B, HS and VS) line is 75Ω (like TV). The analog video signal is obtained simply thought a 270Ω resistor (1-bit DAC) for R, G and B signals. With a digital output of 3.3V (I assume a LVCMOS33 IO STANDARD for your FPGA) the analog voltage outputs are

• with logic "0" at FPGA pin the analog voltage is 0V, that represents black for that colour
• with logic "1" at FPGA pin the analog voltage is 3.3V * 75Ω / (75Ω + 270Ω) = 0.71V that represents maximum bright for that primarily colour (R, G or B)

The FPGA (or CPLD) normally can drive the VGA signals directly, there's no need of voltage buffer nor other special hardware. The maximum bright in a R, G or B signal is represented by 0.7V. If you use other IO standard like LVCMOS 2.5V, obviously you need to use smaller resistors. With this 3 resistors only 8 colours can be obtained, you can select the output colour among the 8 possible ones with the CTL(2:0) register.

For VGA signal format information, see VGA Video Signal Format and Timing Specifications.

Cheat: One Unique Output Colour

If you can't afford to use 3 FPGA pins for R, G, B signals then connect only one output pin (R, G or B) to the 3 resistors to obtain a nice white output colour, it will be the only possible output color. This saves 2 FPGA pins.

By other hand, to achieve a less brilliant colour, put bigger resistors so that the analog video signal level is below 0.7V.

Interface with PicoBlaze

The interconnection with PicoBlaze is as usual, like any other peripheral:

• Define output (for OUTPUT instruction) registers for CTL, CRX and CRY, decode port_id and write_strobe signal to assert register's ce control signal.
• Add TEXT and FONT RAM memories. The RAM addresses generated by this macro are ready at least 6 clock cycles (f=25MHz) prior the data is transferred, so the timing shouldn't be a problem, simply assert memory's enable pin forever.

View a complete example of how to use this macro in The Game Of Life for PicoBlaze.

Download

Obtain A Fixed-Width Console Font

VGA80x40 part stores in a ROM (for example a read-only Xilinx BRAM) the bitmap of each character associated with each ISO-LATIN-1 code (8-bits). You can choose other coding scheme if you want.

Where can we obtain a console font?

Using a font editor you can draw your own characters but it's easy to take an already made one. Linux kbd package comes with many console fonts (fixed-width bitmap fonts) in the folder /data. The PSF (Poscript Font) format is easy to understand and it's documented in de /doc directory of the package.

The provided ruby script psf2coe.rb translates PSF1 format file into Xilinx COE file to store the console fixed-width bitmap font in a BRAM inside the FPGA. If you want to render the *.psf file in a text file or to do the opposite operation (font editor) use NAFE.

Possible Enhances For The Macro

• Optional use of an "attribute" memory to display characters in different colours.
• TV out (monochrome composite signal or colour thought SCART port).
• Different resolutions (800x600px modes)
• etc

Although some of this features could be useful, I prefer to maintain this macro in a small size. This macro is not intended to compete with the ultimate 3d video card in the market but to be a small and useful peripheral for your FPGA projects.

References

• PSF file format
• VGA Timings
• "Conceptos básicos de arquitectura y sistemas operativos. Curso de ordenadores", Gregorio Fernández, 3º edición, ISBN 84-605-0522-7
• VGA pinouts

1. ↑ You can also define them in pure VHDL and let synthetizer to recognize them as BRAM memories but this way is not recommended